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S6E2C2 Datasheet, PDF (173/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller
S6E2C2 Series
12.4.19 Ethernet-MAC Timing
RMII Transmission (100 Mbps/10 Mbps)
(ETHVCC = 3.0V to 3.6V, 4.5V to 5.5V*1, VSS = 0V, CL = 25 pF)
Parameter
Reference clock cycle time*2
Symbol
tREFCYC
Pin Name
E_RXCK_REFCK
Conditions
20ns (typical)
Value
Min
Max
Unit
-
-
ns
Reference clock
High-pulse-width duty cycle
tREFCYCH
E_RXCK_REFCK
tREFCYCH/tREFCYC
35
65
%
Reference clock
Low-pulse-width duty cycle
tREFCYCL
E_RXCK_REFCK
tREFCYCL/tREFCYC
35
65
%
Transmitted data → REFCK ↑
delay time
tRMIITX
E_TX03, E_TX02,
E_TX01, E_TX00,
E_TXEN
-
-
12
ns
*1: When ETHV = 4.5V to 5.5V, it is recommended to add a series resistor at the output pin to suppress the output
current.
*2: The reference clock is fixed to 50 MHz in the RMII specifications. The clock accuracy should meet the PHY-device
specifications.
E_RXCK_REFCK
E_TX03
E_TX02
E_TX01
E_TX00
E_TXEN
tREFCYC
VIHS
VILS
VIHS
tREFCYCH
tREFCYCL
VOH
VOL
tRMIITX
Document Number: 002-05030 Rev.*A
Page 173 of 207