S6E2C2 Datasheet, PDF (177/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller

S6E2C2 Series
MII Receiving (100 Mbps/10 Mbps)
(ETHVCC = 3.0V to 3.6V, 4.5V to 5.5V, VSS = 0V, CL = 25 pF)
Parameter
Receiving clock
cycle time*
Receiving clock
High pulse width duty cycle
Receiving clock
Low pulse width duty cycle
Received data →
REFCK ↑Setup time
REFCK ↑ →
Received data Hold time
Symbol
Pin Name
tRXCYC
E_RXCK_REFCK
tRXCYCH
tRXCYCL
tMIIRXS
tMIIRXH
E_RXCK_REFCK
E_RXCK_REFCK
E_RX03, E_RX02,
E_RX01, E_RX00,
E_RXDV
E_RX03, E_RX02,
E_RX01, E_RX00,
E_RXDV
Conditions
100 Mbps
40 ns (typical)
100 Mbps
400 ns (typical)
tRXCYCH/tRXCYC
tRXCYCL/tRXCYC
-
-
Value
Min
Max
Unit
-
-
ns
-
-
ns
35
65
%
35
65
%
5
-
ns
2
-
ns
*: The reference clock is fixed to 50 MHz in the RMII specifications.
The clock accuracy should meet the PHY-device specifications.
E_RXCK_REFCK
E_RX03
E_RX02
E_RX01
E_RX00
E_RXDV
tRXCYC
V_IHS
V_ILS
tRXCYCH
V_IHS
tRXCYCL
V_IHS
V_ILS
tMIIRXS
V_IHS
V_ILS
tMIIRXH
Document Number: 002-05030 Rev.*A
Page 177 of 207