S6E2C2 Datasheet, PDF (183/207 Pages) Cypress Semiconductor – 32-bit ARM® Cortex®-M4F FM4 Microcontroller

S6E2C2 Series
12.4.21 High-Speed Quad SPI Timing
(VCC = 2.7V to 3.6V, VSS = 0V)
Parameter
Serial clock frequency
Symbol
tSCYCM
Pin Name
Q_SCK_0
Conditions
CL = 15 pF,
VCC = 3.0 to 3.6V
CL = 30 pF
Value
Min
Max
-
66
-
50
Unit Remarks
MHz
*1
MHz
*2
Enabled CS→
CLK Starting Time
(mode0/mode2)
Enabled CS→
tOSLSK02
1.5×tSCYCM - 5
-
ns
CLK Starting Time
(mode1/mode3)
CLK Last→
tOSLSK13
Q_SCK_0,
Q_CS0_0,
Q_CS1_0,
CL = 30 pF
tSCYCM - 5
-
ns
Disabled CS Time
(mode0/mode2)
CLK Last→
Disabled CS Time
(mode1/mode3)
tOSKSL02 Q_CS2_0
tOSKSL13
tSCYCM
1.5×tSCYCM
-
ns
-
ns
SIO Data output time
tOSDAT
CL = 15 pF,
Q_SCK_0, ^{VCC = 3.0 to 3.6V}
0
Q_IO0_0,
CL = 30 pF
0
Q_IO1_0,
SIO Setup
tDSSET
Q_IO2_0,
Q_IO3_0
CL = 30 pF
3
10
5
ns
5
-
ns
*1
-
*2
SIO Hold
tSDHOLD
CL = 30 pF
0.5×tSCYCM
-
ns
*1: When RTM = 1 and mode = 0, 1, 3
*2: When RTM = 1 and mode = 2 or RTM = 0 and mode = 0, 1, 2, 3
Notes:
− See Chapter 8-3: High-Speed Quad SPI controller in FM4 Family Peripheral Manual Communication Macro Part
(002-04862) for the detail of RTM mode.
− When using High-Speed Quad SPI, please set PDSR register to set the pin drive capability for VCC = 3V. See Chapter 12:
I/O Port in FM4 Family Peripheral Manual Main Part (002-04856) for the details.
Document Number: 002-05030 Rev.*A
Page 183 of 207