AMIS-53000 Datasheet, PDF (94/99 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53000 Frequency Agile Transceiver
9.2.9. RF Test MUX
This register is used for factory testing of the AMIS-53000 and has no user functions.
9.2.10. Digital Test MUX A
Table 115: Digital Test MUX A - 0X4B [75]
Bit Test Pin
Comment
7:4 _{MUX to SCLK}
1111 - 0000
3:0 _{MUX to Dopt}
1111 - 0000
1111
1110
1101
1100
1011
1010
1001
1000
1111
1110
1101
1100
1011
1010
1001
1000
Space Q channel CLK
Mark Q channel CLK
NC
Data Q channel
PN code from Σ∆
Start
Analog data out
PLL detect/data out
Space I channel CLK
Mark I channel CLK
PLL detect/NCO out
Energy detected
Data I channel
RF PLL CLK feedback
Is locked (encoder)
TX data
0111
0110
0101
0100
0011
0010
0001
0000
0111
0110
0101
0100
0011
0010
0001
0000
Energy dwell enable
PLL increment
TX enable
10kHz clock
Software state [3]
Bandgap ready
ADC CLK
Normal/system clock
Code dwell enable
PLL decrement
Kicker
PLL Z
Software state [2]
PLL xReset
ADC power down
D optional
9.2.11. Digital Test MUX B
Table 116: Digital Test MUX B - 0X4C [76]
Bit Test Pin
Comment
7:4 _{MUX to xINT}
1111 - 0000
3:0 MUX to xBurst
1111- 0000
1111
1110
1101
1100
1011
1010
1001
1000
1111
1110
1101
1100
1011
1010
1001
1000
Encoder in
Decoder in
Sniff
Σ∆ output
RF PLL (reference
CLK)
Brown-out output
Receive done
TS CLK
Recovered clock
Decoder out
Encoder out
CDR enable
Baud clock (CDR out)
CRC failed
RX enable
NC
0111
0110
0101
0100
0011
0010
0001
0000
0111
0110
0101
0100
0011
0010
0001
0000
Cal done kicker
PLL in range
INT0
Transmit done
Software state [1]
Xtal on
ADC done
xInterrupt
PA enable
PLL cal timer
overflow
PLL cal enable
xtal PD
Software state [0]
isStopMode
Watch dog reset
SSN normal mode
AMI Semiconductor – Aug. 05, Rev. 1.0
94
www.amis.com
Data Sheet