AMIS-53000 Datasheet, PDF (41/99 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53000 Frequency Agile Transceiver
Data Sheet
Setup registers descriptions:
RF Divider- The RF frequency of the receiver must be configured. This is done in two steps, one is setting the RF divider and
the other is setting the fractional N word.
RF Frequency- Program the 3 register fractional N word.
Peak Deviation- When the data modulation is to be FSK, the 2 register peak deviation must also be set. The deviation should
be set to a value between ½ and 1 times the data rate.
PLL- Configure the parameters for the PLL.
Loop Filter- Configure the parameters for the loop filter.
6.4.1.1. RF Divider
Setting the RF channel frequency is done through the RF divider register, along with the RF frequency 2, 1 and 0 registers. The RF
divider register is used to specify the integer portion of the divide value, and the RF frequency 2, 1 and 0 registers are used to specify
the fraction. The values are calculated as follows:
Where F_Channel is the desired RF center frequency. The value for the RF divider register is found by,
Where integer is the value used for RF divider. The last step is to calculate the fractional value. This is done as,
Fraction is the value to be used in the RF frequency 2, 1 and 0 registers. As an example, if the desired RF frequency channel is
903.5MHz,
For this example, the RF divider register is written to 0x26, RF frequency 2 is written to 0xFE, RF frequency 1 to 0x95, and RF
frequency 0 to 0x54.This value +/- 1 is fed directly to the PLL as N0 and N1. (i.e. if 63, send 64 and 65 to the PLL)
Table 18: RF Divider - 0X05 [5]
Bit
Name
7:0
RF_divide [7:0]
Comment
00h through 0Bh: not allowed
1Ah: divide by 26
1Bh: divide by 27
-----------
4Ah: divide by 74
4Bh: divide by 75
4Ch through FFh: not allowed
AMI Semiconductor – Aug. 05, Rev. 1.0
41
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