AMIS-53000 Datasheet, PDF (23/99 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53000 Frequency Agile Transceiver
Data Sheet
5.6 ADC
The ADC is a successive approximation analog to digital converter, using an internal 8 bit DAC as the reference. The ADC data for the
selected input channel(s) will be stored in the associated register, allowing for external access to the conversion data through the serial
interface. Conversion speed is register selectable up to 128kS/s. Commands in the control register allow for single or continuous
operation of the ADC.
A voltage regulator generates the 2.0V reference for the ADC and DAC based upon an internal bandgap voltage source. The ADC has
six inputs, two of which are available to the designer for use in their application.
5.7 Control Interface Serial Bus
The AMIS-53000 uses a 3-wire or 2-wire I²C interface to communicate with the AMIS-53000 internal registers. The AMIS-53000 will
automatically determine which interface to use by determining the states of the three lines; SDATA, SCLK and SSN (the interface is set
when the external host/controller writes the first data to the AMIS-53000). Once the AMIS-53000 has determined the type of interface,
it will continue with that configuration until power is removed from the part or the part is reset.
I²C: If SSN is high and an I²C start bit is detected, I²C mode is enabled.
SPI: If SSN is low, and a negative edge on SCLK detected, SPI mode is enabled.
The AMIS-53000 is designed to conform to the Philip Semiconductor I²C standard with the AMIS-53000 as the slave device.
Figure 13: I²C Serial Bus Connections
AMI Semiconductor – Aug. 05, Rev. 1.0
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