AMIS-53000 Datasheet, PDF (78/99 Pages) AMI SEMICONDUCTOR – Frequency Agile Transceiver

AMIS-53000 Frequency Agile Transceiver
Data Sheet
Table 87: Data Rate/Format - 0X0B [11]
Bit
Name
State Comment
7
NU
6
NU
5
NU
1
Enables user programmable data rate
4
Use Custom
0
1
Manchester encoding selected
3
Manchester
0
NRZ encoding selected
000
1.2kbps
001
2.4kbps
010
4.8kbps
2:0
DDRATE [2:0]
011
100
9.6kbps
19.2kbps
101
57.6kbps
110
96kbps
111
128kbps
7.1.4. General Options A
The general options A register contains a number of options that specify the operation of the part in its various modes.
Standby Mode: Determines whether the crystal oscillator is enabled during standby. For applications relying on the
AMIS-53000 to provide and external host/controller with a system clock, this bit should be enabled, and is the default state.
POR State: Specifies the power on state of the device. Once this has been stored into EE, the device will power up in the
chosen state after the EE has been shadowed into the working registers.
Pull up Disable: For applications not using an open drain type driver to drive the register interface pins (SDATA, SCLK and
SSN) the pull ups on these pins can be disabled via this option bit to save power.
Temperature Compensation: When enabled, the ADC output for the temperature sensor is used to compensate the RF
center frequency for crystal frequency error. A new correction factor is calculated each time the ADC performs a new
conversion on the temperature sensor.
CRC Enable: Enables internal CRC checking in RX, and appends a CRC in TX.
Length of Packet Enable: Allows buffering of packets, also allows CRC when enabled.
Use ID in RX and TX: When enabled, in receive mode the part will not output data until a valid ID is found, and in TX, the part
will automatically send preamble and chip ID before enabling the data interface.
AMI Semiconductor – Aug. 05, Rev. 1.0
78
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