EP20K200C Datasheet, PDF (85/90 Pages) Altera Corporation – Programmable Logic

APEX 20KC Programmable Logic Device Data Sheet
Table 67. EP20K1000C External Bidirectional Timing Parameters
Symbol
-7 Speed Grade
-8 Speed Grade
-9 Speed Grade
Unit
t_INSUBIDIR
t_INHBIDIR
t_OUTCOBIDIR
t_XZBIDIR
t_ZXBIDIR
t_INSUBIDIRPLL
t_INHBIDIRPLL
t_{OUTCOBIDIRPLL}
t_XZBIDIRPLL
t_ZXBIDIRPLL
Min
Max
Min
Max
Min
Max
1.86
2.54
3.15
ns
0.00
0.00
0.00
ns
2.00
4.63
2.00
5.26
2.00
5.69
ns
8.98
9.89
10.67
ns
8.98
9.89
10.67
ns
4.17
5.27
-
ns
0.00
0.00
-
ns
0.50
2.32
0.50
2.55
-
-
ns
6.67
7.18
-
ns
6.67
7.18
-
ns
Tables 68 and 69 show selectable I/O standard input and output delays
for APEX 20KC devices. If you select an I/O standard input or output
delay other than LVCMOS, add the delay for the selected speed grade to
the LVCMOS value.
Table 68. Selectable I/O Standard Input Delays
Symbol
-7 Speed Grade
-8 Speed Grade
-9 Speed Grade
Unit
LVCMOS
LVTTL
2.5 V
1.8 V
PCI
GTL+
SSTL-3 Class I
SSTL-3 Class II
SSTL-2 Class I
SSTL-2 Class II
LVDS
CTT
AGP
Min
Max
Min
Max
Min
Max
Min
0.00
0.00
0.00
0.04
0.00
–0.30
–0.19
–0.19
–0.19
–0.19
–0.19
0.00
0.00
0.00
0.00
0.00
0.11
0.04
0.25
–0.13
–0.13
–0.13
–0.13
–0.17
0.00
0.00
0.00
ns
0.00
ns
0.00
ns
0.14
ns
0.03
ns
0.23
ns
–0.13
ns
–0.13
ns
–0.13
ns
–0.13
ns
–0.16
ns
0.00
ns
0.00
ns
Altera Corporation
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