EP20K200C Datasheet, PDF (54/90 Pages) Altera Corporation – Programmable Logic

APEX 20KC Programmable Logic Device Data Sheet
Generic Testing
Operating
Conditions
■ Jam Programming & Test Language Specification
Each APEX 20KC device is functionally tested. Complete testing of each
configurable SRAM bit and all logic functionality ensures 100% yield.
AC test measurements for APEX 20KC devices are made under conditions
equivalent to those defined in the “Timing Model” section on page 65.
Multiple test patterns can be used to configure devices during all stages of
the production flow. AC test criteria include:
■ Power supply transients can affect AC measurements.
■ Simultaneous transitions of multiple outputs should be avoided for
accurate measurement.
■ Threshold tests must not be performed under AC conditions.
■ Large-amplitude, fast-ground-current transients normally occur as
the device outputs discharge the load capacitances. When these
transients flow through the parasitic inductance between the device
ground pin and the test system ground, significant reductions in
observable noise immunity can result.
Tables 17 through 20 provide information on absolute maximum ratings,
recommended operating conditions, DC operating conditions, and
capacitance for 1.8-V APEX 20KC devices.
Table 17. APEX 20KC Device Absolute Maximum Ratings Note (1)
Symbol
Parameter
V _CCINT
V _CCIO
V_I
I _OUT
T _STG
T _AMB
T_J
Supply voltage
DC input voltage
DC output current, per pin
Storage temperature
Ambient temperature
Junction temperature
Conditions
With respect to ground (2)
No bias
Under bias
PQFP, RQFP, TQFP, and BGA
packages, under bias
Ceramic PGA packages, under bias
Min
Max Unit
–0.5
2.5
V
–0.5
4.6
V
–0.5
4.6
V
–25
25
mA
–65
150 ° C
–65
135 ° C
135 ° C
150 ° C
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Altera Corporation