EP20K200C Datasheet, PDF (56/90 Pages) Altera Corporation – Programmable Logic

APEX 20KC Programmable Logic Device Data Sheet
Table 20. APEX 20KC Device Capacitance Note (10)
Symbol
Parameter
Conditions
Min
Max Unit
C_IN
C_INCLK
Input capacitance
Input capacitance on
dedicated clock pin
V_IN = 0 V, f = 1.0 MHz
V_IN = 0 V, f = 1.0 MHz
8
pF
12
pF
C_OUT Output capacitance
V_OUT = 0 V, f = 1.0 MHz
8
pF
Notes to Tables 17 through 20:
(1) See the Operating Requirements for Altera Devices Data Sheet.
(2) Minimum DC input is –0.5 V. During transitions, the inputs may undershoot to –2.0 V or overshoot to 4.6 V for input
currents less than 100 mA and time periods shorter than 20 ns.
(3) Numbers in parentheses are for industrial-temperature-range devices.
(4) Maximum V_CC rise time is 100 ms, and V_CC must rise monotonically.
(5) All pins, including dedicated inputs, clock, I/O, and JTAG pins, may be driven before V_CCINT and V_CCIO are
powered.
(6) Typical values are for T_A = 25° C, V_CCINT = 1.8 V, and V_CCIO = 1.8 V, 2.5 V or 3.3 V.
(7) These values are specified under the APEX 20KC device recommended operating conditions, shown in Table 18 on
page 55.
(8) This value is specified for normal device operation. The value may vary during power-up.
(9) Pin pull-up resistance values will be lower if an external source drives the pin higher than V_CCIO.
(10) Capacitance is sample-tested only.
Tables 21 through 35 list the DC operating specifications for the supported
I/O standards. These tables list minimal specifications only; APEX 20KC
devices may exceed these specifications.
Table 21. LVTTL I/O Specifications
Symbol
V_CCIO
V_IH
V_IL
I_I
V_OH
V_OL
Parameter
Output supply
voltage
High-level input
voltage
Low-level input
voltage
Input pin leakage
current
High-level output
voltage
Low-level output
voltage
Conditions
V_IN = 0 V or 3.3 V
I_OH = –12 mA,
V_CCIO = 3.0 V (1)
I_OL = 12 mA,
V_CCIO = 3.0 V (2)
Minimum
3.0
2.0
–0.3
–10
2.4
Maximum
3.6
V_CCIO + 0.3
0.8
10
0.4
Units
V
V
V
µA
V
V
56
Altera Corporation