EP2S15 Datasheet, PDF (165/238 Pages) Altera Corporation – Stratix II Device Family

DC & Switching Characteristics
Table 5–36. Stratix II Performance Notes (Part 2 of 6) Note (1)
Resources Used
Performance
Applications
TriMatrix
Memory
M-RAM
block
Single port
RAM 4K × 144 bit
Simple dual-port
RAM 4K × 144 bit
True dual-port
RAM 4K × 144 bit
Single port
RAM 8K × 72 bit
Simple dual-port
RAM 8K × 72 bit
True dual-port
RAM 8K × 72 bit
Single port
RAM 16K × 36 bit
Simple dual-port
RAM 16K × 36 bit
True dual-port
RAM 16K × 36 bit
Single port
RAM 32K × 18 bit
Simple dual-port
RAM 32K × 18 bit
True dual-port
RAM 32K × 18 bit
Single port
RAM 64K × 9 bit
Simple dual-port
RAM 64K × 9 bit
True dual-port
RAM 64K × 9 bit
ALUTs
0
TriMatrix
Memory
Blocks
DSP
Blocks
-3
Speed
Grade
(2)
1
0 349.65
-3
Speed
Grade
(3)
333.33
-4
Speed
Grade
303.95
-5
Speed Unit
Grade
261.09 MHz
0
1
0 420.16 400.00 364.96 313.47 MHz
0
1
0 349.65 333.33 303.95 261.09 MHz
0
1
0 354.60 337.83 307.69 263.85 MHz
0
1
0 420.16 400.00 364.96 313.47 MHz
0
1
0 349.65 333.33 303.95 261.09 MHz
0
1
0 364.96 347.22 317.46 271.73 MHz
0
1
0 420.16 400.00 364.96 313.47 MHz
0
1
0 359.71 342.46 313.47 268.09 MHz
0
1
0 364.96 347.22 317.46 271.73 MHz
0
1
0 420.16 400.0 364.96 313.47 MHz
0
1
0 359.71 342.46 313.47 268.09 MHz
0
1
0 364.96 347.22 317.46 271.73 MHz
0
1
0 420.16 400.0 364.96 313.47 MHz
0
1
0 359.71 342.46 313.47 268.09 MHz
Altera Corporation
May 2007
5–29
Stratix II Device Handbook, Volume 1