AK7750 Datasheet, PDF (61/77 Pages) Asahi Kasei Microsystems – Audio DSP with Built-in Hands-Free Phone Features

[ASAHI KASEI]
[AK7750]
3) Writing During RUN
a) Coefficient RAM write preparation and write ( under RUN condition )
This procedure is used to re-write the Coefficient RAM (CRAM) while a program is being executed. After
inputting a command code, data for up to 16 consecutive addresses can be written.
Next, input a write command code and a starting address. Rewriting of the RAM contents is executed
whenever a re-written address is assigned.
For example, this is how 5 writes are executed, starting at the Coefficient RAM address of “ 10 “:
Coefficient RAM execution address _{7 8 9 10 11 13 16 11 12 13 14 15}
ÈÈ
ÈÈÈ
write execution location
||Ç
|||
*) Note that address “ 13 “ is not processed until the data at address “ 12 “ is re-written.
Data transfer procedure
* Write preparation
c Command code A8h (1 0 1 0 1 0 0 0)
d Data (D15 y y y y y y D8)
e Data (D7 y y y y y y D0)
* Write operation
c Command code A4h (1 0 1 0 0 1 0 0)
d Address upper (0 0 0 0 0 0 A9 A8)
e Address lower (A7 y y y y y y A0)
Note) Be sure to follow the procedure of write preparation first, then write. An erroneous operation occurs
if write is done without write preparation. “L” period of RDY for the write preparation is shorter than 1
master clock (20ns) under typical condition
S_RESET =H
RQ
SCLK
SI
RDY
SO
10101000 D15yyyyD0
10100100 0yyA9yyA0
AL
max 200ns
Longer of (16-n) x 2 MCLK
(n: number of data) and AL
RDYLG *)
*) RDYLG pulse width is 2 LRCLK clock time maximum if a program is so written to re-
write a new address within a single sampling time. After this, RDY signal goes high.
CRAM Write Preparation and Write
[MS0296-E-00]
61
2005/03