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AK7750 Datasheet, PDF (39/77 Pages) Asahi Kasei Microsystems – Audio DSP with Built-in Hands-Free Phone Features | |||
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[ASAHI KASEI]
[AK7750]
5) CONT4 : CLKO and Other Setting
Writing during the system reset ( S_RESET = âLâ) is recommended.
Command Code Name
D7
D6
D5
D4
D3
D2
D1
D0 Default
Write Read
68h
78h
CONT4
c D7:TEST
TEST
CLKS1 CLKS0 CLKE_N BLCKE_N OUT4E
TEST
X 0000_000x
0: normal operation
1: Test mode (do not use)
d D6,D5:CLKS1,CLKS0 CLKO Output Clock Select
CLKO outputs âLâ level during the system reset. After the release of the system reset, selected value is
output by CLKS1 and CLKS0.
CLKS mode CLKS1 CLKS0
CLKO
0
0
0
1
0
1
2
1
0
3
1
1
see the following table
MCLK/3
MCLK/2
N/A
1) in CLKS mode 0, at CKSX = â1â or ( CKSX = âLâ & SMODE = âHâ )
fs: sampling frequency
DFS DFS
mode [2:0]
fs(kHz)
CLKO output
0
0h
48(,44.1)
1
1h
96(,88.2)
2
2h
192(,176.4)
3
3h
32(,29.4)
4
7h
8
256fs
N/A
N/A
256fs
1024fs
2) in CLKS mode 0,at CKSX = âLâ & SMODE = âLâ
fs: sampling frequency
BCK CKS pin fs(kHz)
mode [1:0]
CLKO
output
0
0h
48(,44.1)
256fs
1
1h
96(,88.2)
N/A
2
2h
192(,176.4)
N/A
3
3h
8
1024fs
e D4:CLKE_N CLKO Output Control pin
0: CLKO output select
1: CLKO output is set to âLâ.
f D3:BITCLKE_N BITCLK, LRCLK Output Control pin
0: enables outputs of BITCLK,LRCLK(@EESEL=âHâ,SMODE=âHâ),BITCLK_O,LRCLK_O
1: sets BITCLK, LRCLK(@EESEL = âHâ, SMODE = âHâ ),BITCLK_O,LRCLK_O outputs to either âLâ or
âHâ .
g D2:OUT4E
0: SDOUT4A = âLâ
1: SDOUT4A output enable
h D1:TEST
0: normal operation
1: Test mode (do not use)
i D0 : set â0â.
note) Under-lined set values in c ~h above indicate the default values.
[MS0296-E-00]
39
2005/03
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