AK7750 Datasheet, PDF (35/77 Pages) Asahi Kasei Microsystems – Audio DSP with Built-in Hands-Free Phone Features

[ASAHI KASEI]
[AK7750]
1) CONT0 : Sampling Rate Selection and Interface Types
writing is possible only at a system reset ( S_RESET = “L”).
Command
Code
Write Read
60h
70h
Name
CONT0
D7
DFS2
D6
DFS1
D5
DFS0
D4
DIF2
D3
DIF1
D2
D1
DIF0 CKRST
D0 Default
X
0000_000x
c D7, D6, D5: DFS [2:0] Sampling Rate Set
DFS
mode
0
1
2
3
4
DFS
[2:0]
0h
1h
2h
3h
7h
fs(kHz)
48(,44.1)
96(,88.2)
192(,176.4)
32(,29.4)
8
DSP
STEP
768
384
192
1152
4608
fs: sampling frequency
AD
DA
operation operation
{
{
×
×
×
×
{
{
{
{
note1) mode and sampling rate selection are only valid in modes 0 ~ 4.
note2) when selecting modes 1 or 2, “1” must be set at PSAD (D7) bit of CONT2 register and at PSCODEC
(D7) bit of CONT6 register. When CKSK is set to “L”, operation follows the CSK0 and CSK1 setting.
d D4, D3, D2: DIF [2:0] Input Mode Selection of SDIN1, SDIN2, SDIN3H, SDIN4, SDIN5A
DIF mode
0
1
2
3
4
SMODE
“L”,”H”
“L”,”H”
“L”,”H”
“L”,”H”
“L”,”H”
“L”
“L”
DIF[2]
0
0
0
0
1
1
1
DIF[1]
0
0
1
1
0
0
1
DIF[0]
0
1
0
1
0
1
0
MSB-justified format(24bit)
LSB-justified format(24bit
LSB-justified format(20bit)
LSB-justified format(16bit)
I2S format(24bit)
PCM1 SF(64fs only)
PCM2 LF(64fs only)
e D1:CKRST
0: operating condition
1: internal clock reset
When CKS2, CKS1, CKS0 and SMODE pins are switched or when the XTI input clock is changed, the new
settings will take effect after toggling the CKRST from “1” to “0” (similar to CK_RESET pin).
f D1: Set “0”
note) under-lined values in c ~ e above indicate the default values
[MS0296-E-00]
35
2005/03