AK7750 Datasheet, PDF (52/77 Pages) Asahi Kasei Microsystems – Audio DSP with Built-in Hands-Free Phone Features

[ASAHI KASEI]
[AK7750]
c) Coefficient RAM write (during reset phase)
5 bytes of data are used to perform coefficient RAM write operations (during the reset phase). When all
data has been transferred, the RDY terminal goes to "L". Upon completing the CRAM write, RDY goes to
"H" to allow the next data to be input. When writing to sequential addresses, input the data as shown below.
To write discontinuous data, transition the RQ terminal from "H" to "L" and then input the command code,
address and data.
Note) “L” period of RDY is shorter than 1 master clock (20ns) under typical condition
Data transfer procedure
c Command code A0h
d Address upper
e Address lower
f Data
g Data
(1 0 1 0 0 0 0 0 )
(0 0 0 0 0 0 A9 A8)
(A7 . . . . . . . A0)
(D15 . . . . . . D8)
(D7 . . . . . . D0)
S_RESET
RQ
SCLK
SI
RDY
SO
S_RESET
RQ
SCLK
SI
RDY
SO
10100000 000000A9A8 A7****A1A0 D15****D0 D15****D0
Input of continuous address data into CRAM
10100000 000000A9A A7***A1A0 D15****D0
8
10100000
A7***A1A0 D15**
Input of discontinuous address data into CRAM
[MS0296-E-00]
52
2005/03