HMC7043 Datasheet, PDF (8/44 Pages) Analog Devices – JEDEC JESD204B support

Data Sheet
Parameter
LVDS MODE (HIGH POWER)
Maximum Operating Frequency
Output Rise Time
Output Fall Time
Output Duty Cycle¹
Differential Output Voltage Magnitude
Common-Mode Output Voltage
CMOS MODE
Maximum Operating Frequency
Output Rise Time
Output Fall Time
Output Duty Cycle¹
Output Voltage
High
Low
1 _{Guaranteed by design and characterization.}
HMC7043
Min Typ
1700
145
105
145
100
47.5 50
750
730
1.1
Max
52.5
Unit
MHz
ps
ps
ps
ps
%
mV p-p diff
mV p-p diff
V
Test Conditions/Comments
3.5 mA
Differential output voltage = 600 mV p-p diff
fCLKOUT = 245.76 MHz, 20% to 80%
fCLKOUT = 983.04 MHz, 20% to 80%
fCLKOUT = 245.76 MHz, 20% to 80%
fCLKOUT = 983.04 MHz, 20% to 80%
fCLKOUT = 1075 MHz (2150 MHz/2)
fCLKOUT = 245.76 MHz (2949.12 MHz/12)
fCLKOUT = 983.04 MHz (2949.12 MHz/3)
fCLKOUT = 245.76 MHz (2949.12 MHz/12)
600
425
420
47.5 50
MHz
ps
ps
52.5 %
Single-ended output voltage = 940 mV p-p diff
fCLKOUT = 245.76 MHz, 20% to 80%
fCLKOUT = 245.76 MHz, 20% to 80%
fCLKOUT = 1075 MHz (2150 MHz/2)
VCC
V
VCC − 0.5
V
0.07
V
0.5
V
Load current = 1 mA
Load current = 10 mA
Load current = 1 mA
Load current = 10 mA
Rev. B | Page 7 of 43