Z8523L08VEG Datasheet, PDF (97/118 Pages) Zilog, Inc. – Enhanced Serial Communications Controller

Z80230/Z85230/L
Product Specification
92
Table 47. Z85230/L AC Characteristics (20MHz applies only to Z85230) (Continued)
8.5 MHz
10 MHz
16 MHz
20 MHz
No Symbol
Parameter
Min Max Min Max Min Max Min Max Notes
35a TdWRr
WR Fall to DTR/
4
4
4
4
7
(REQ)
REQ Not Valid
35b TdWRr
(REQ)
WR Fall to DTR/
REQ Not Valid
168
100
50
60
50 5, 6
8
36 TdRDr
RD Rise to DTR/
NA
NA
NA
NA 6
(REQ)
REQ Not Valid
Delay
37 TdPC (INT) PCLK Fall to INT
500
320
175
160 6
Valid Delay
38 TdIAi (RD) INTACK to RD Fall 145
90
50
45
4, 6
(ACK) Delay
39 TwRDA
RD (Acknowledge) 145
125
75
65
6
Width
40 TdRDA (DR) RD Fall (ACK) to 135
120
70
60
6
Read Data Valid
Delay
41 TsIEI (RDA) IEI to RD Fall
95
95
50
45
6
(ACK) Setup Time
60
8
42 ThIEI (RDA) IEI to RD Rise
0
0
0
0
6
(Ack) Hold Time
43 TdIEI (IEO) IEI to IEO Delay
95
90
45
40 6
Time
44 TdPC (IEO) PCLK Rise to IEO
195
175
80
Delay
80 6
45 TdRDA
(INT)
RD Fall to INT
Inactive Delay
480
320
200
180 3, 6
46 TdRD
RD Rise to WR 15
15
10
10
6
(WRQ)
Fall Delay for No
Reset
47 TdWRQ
WR Rise to RD 15
15
10
10
6
(RD)
Fall Delay for No
Reset⁶
48 TwRES
WR and RD Low 145
100
75
65
6
for Reset
PS005308-0609
Electrical Characteristics