Z8523L08VEG Datasheet, PDF (100/118 Pages) Zilog, Inc. – Enhanced Serial Communications Controller

Z80230/Z85230/L
Product Specification
95
Table 48 lists the Z85230/L general timing characteristics details. Table 49 on page 98 lists
the Z85230/L Read/Write Timing characteristics details.
Table 48. Z85230/L General Timing Table (20MHz applies only to Z85230)
8.5 MHz
10 MHz
16 MHz
20 MHz
No Symbol
Parameter
Min Max Min Max Min Max Min Max Notes
1 TdPC (REQ) PCLK to W/REQ
250
200
80
Valid
70 9
2 TdPC (W) PCLK to Wait
Inactive
350
300
180
170 9
3 TsRXC (PC) RxC to PCLK NA
NA
NA
NA
1, 4, 9
Setup Time
4 TsRXD
(RXCr)
5 ThRXD
(RxCr)
6 TsRXD
(RXCf)
RxD to RXC
Setup Time
RxD to RXC
Hold Time
RxD to RXC
Setup Time
0
150
0
0
125
0
0
50
0
0
45
0
1, 9
1, 9
1, 5, 9
7 ThRXD
RXD to RXC
150
125
50
(RXCf)
Hold Time
45
1, 5, 9
8 TsSY (RXC) SYNC to RXC –200
–150
–100
–90
Setup Time
9 ThSY (RXC) SYNC to RXC 5
5
5
5
Hold Time
1, 9
1, 10
10 TsTXC (PC) TxC to PCLK NA
NA
NA
NA
Setup Time^2,4
11 TdTXCf
(TXD)
TxC to TxD
Delay
12 TdTxCr
(TXD)
TxC to TxD
Delay
13 TdTXD (TRX) TxD to TRxC
Delay
190
150
80
190
150
80
200
140
80
70 2, 9
70 2, 5, 9
70 9
14 TwRTXh
RTxC High
130
120
80
Width
15 TwRTXI
RTxC Low Width 130
120
80
70
6, 9
70
6, 9
PS005308-0609
Electrical Characteristics