Z8523L08VEG Datasheet, PDF (39/118 Pages) Zilog, Inc. – Enhanced Serial Communications Controller

Z80230/Z85230/L
Product Specification
34
Table 5. Z80230 Register Map (Shift Left Mode) (Continued)
AD5
AD4
AD3
AD2
AD1
Write
80230
80230
80230 WR15 D2=1
WR15 D2=0 WR15 D2=1 WR7’ D6=1
0
1
1
0
0
WR12B
RR12B
RR12B
RR12B
0
1
1
0
1
WR13B
RR13B
RR13B
RR13B
0
1
1
1
0
WR14B
RR14B
RR14B
(WR7’B)
0
1
1
1
1
WR15B
RR15B
RR15B
RR15B
1
0
0
0
0
WR0A
RR0A
RR0A
RR0A
1
0
0
0
1
WR1A
RR1A
RR1A
RR1A
1
0
0
1
0
WR2
RR2A
RR2A
RR2A
1
0
0
1
1
WR3A
RR3A
RR3A
RR3A
1
0
1
0
0
WR4A
(RR0A)
(RR0A)
(WR4A)
1
0
1
0
1
WR5A
(RR1A)
(RR1A)
(WR5A)
1
0
1
1
0
WR6A
(RR2A)
RR6A
RR6A
1
0
1
1
1
WR7A
(RR3A)
RR7A
RR7A
1
1
0
0
0
WR8A
RR8A
RR8A
RR8A
1
1
0
0
1
WR9
(RR13A) (RR13A) (WR3A)
1
1
0
1
0
WR10A
RR10A
RR10A
RR10A
1
1
0
1
1
WR11A (RR15A) (RR15A) (WR10A)
1
1
1
0
0
WR12A
RR12A
RR12A
RR12A
1
1
1
0
1
WR13A
RR13A
RR13A
RR13A
1
1
1
1
0
WR14A
RR14A
RR14A
(WR7’A)
1
1
1
1
1
WR15A
RR15A
RR15A
RR15A
Notes:
1. The register names in ( ) are the values read out from that register location.
2. WR15 bit D2 enables status FIFO function (not available on NMOS).
3. WR7’ bit D6 enables extend read function (only on ESCC).
PS005308-0609
Programming