Z8523L08VEG Datasheet, PDF (42/118 Pages) Zilog, Inc. – Enhanced Serial Communications Controller

Z80230/Z85230/L
Product Specification
37
Table 8 through Table 24 on page 53 list the format of each write register.
Table 8. Write Register 0
Bit
7
6
5
4
3
2
1
0
R/W
W
Reset
0
0
0
0
0
0
0
0
R = Read W = Write X = Indeterminate
Bit
Position
R/W
Value Description
7, 6
W
00 Null Code
01 Reset Tx CRC Checker
10 Reset Tx CRC Generator
11 Reset Tx Underrun/EOM Latch
5, 4, 3
000 Null Code
001 Point High
010 Reset Ext/Status Interrupts
011 Send Abort (SDLC)
100 Enable Int on Next Rx Character
101 Reset Tx Int Pending
110 Error Reset
111 Reset Highest IUS
2, 1, 0
000 Register 0
001 Register 1
010 Register 2
011 Register 3
100 Register 4
101 Register 5
110 Register 6
111 Register 7
000 Register 8 (with Point High)
001 Register 9 (with Point High)
010 Register 10 (with Point High)
011 Register 11 (with Point High)
100 Register 12 (with Point High)
101 Register 13 (with Point High)
110 Register 14 (with Point High)
111 Register 15 (with Point High)
For the 80230, bits 1 and 0 are accessible only through Channel B.
PS005308-0609
Programming