Z8523L08VEG Datasheet, PDF (70/118 Pages) Zilog, Inc. – Enhanced Serial Communications Controller

Z80230/Z85230/L
Product Specification
65
Table 36. Read Register 11
Bit
7
6
5
4
3
2
1
0
R/W
R
Hardware Reset
0
0
0
0
0
0
0
0
Channel Reset
X
X
X
X
X
X
X
X
R = Read W = Write X = Indeterminate
Bit
Position
R/W
Value Description
7
CRC Preset I/O
6, 5
00 NRZ
01 NRZI
10 FM1 (Transition = 1)
11 FM0 (Transition = 0)
4
Go Active on Poll
3
Mark/Flag Idle
0 Flag Idle
1 Mark Idle
2
Abort Flag on Underrun
0 Flag
1 Abort
1
Loop Mode
0
6-Bit/8-Bit Sync
0 8-Bit Sync
1 6-Bit Sync
To access this register WR7’ bit 6 must be enabled. If this bit is not enabled, this register reflects
RR15.
PS005308-0609
Programming