Z87000 Datasheet, PDF (35/50 Pages) Zilog, Inc. – Spread Spectrum Controllers

Zilog
Z87000/Z87L00
Spread Spectrum Controllers
The bank is selectable in software by writing to the core’s each of the eight external registers (EXT0 through EXT7)
status register (see Table 24). Once a bank is selected, can be accessed by a single-cycle software instruction.
Table 11. Bank Switching
1
Bank
Bank 0
Bank 1
Bank 2
Bank 3
Status Register
xxxx xxxx x00x xxxx b
xxxx xxxx x01x xxxx b
xxxx xxxx x10x xxxx b
xxxx xxxx x11x xxxx b
Bank Function
Test point access, TDD switching control
Rate buffer access, miscellaneous
ADPCM processor interface, RF interface, etc.
Configuration, status, general-purpose port data and direction
Bank 3 Registers
Table 12. Bank 3 Registers
Config 1
Field
Bank 3
Bit Position
EXT0
R/W Data Description
RESERVED
f--------------- R
W
Returns 0
Must be set to 1
VP_CLOCK
-e--------------
Controls CLKOUT output pin (clock for ADPCM Processor).
Returns 0
0 CLOCKOUT=16.384 MHz
1 CLOCKOUT = 8.192
USE_CORE_BIAS --d-------------
R
W
Controls which bias value is used by the downconverter’s
NCO as part of the automatic frequency control loop (AFC)
Returns 0
0* Uses BIAS_ERROR_DATA value from AFC hardware
1 Uses CORE_BIAS_DATA value from DSP core
SYLE_POLARITY ---c------------
R
W
Controls the polarity of the SYLE output pin (hop pulse)
Returns 0
0 SYLE is a positive pulse
1 SYLE is a negative pulse
WINDOW_SIZE
----ba98--------
Defines the search window size (in bits) for windowed search
mode (for Unique Word or SYNC_D words).
R
Returns 0
W 0000 Window size=1
0001 Window size =3 (1±1)
•••
1111 Window size = 31 (1± 15)
BIAS_THRESHOL -------76543210
D
Bias estimator threshold value
R
Returns 0
W XXh Sets the bias value
Notes:
1. VP_CLOCK. Internally synchronized to avoid glitches. Changes to this bit take effect immediately.
2. SYLE_POLARITY. Changes to this bit take effect immediately.
3. BIAS_THRESHOLD. The bias threshold must be coded as a negative value
(opposite of the threshold value) coded in 2’s complement. The nominal value for the
threshold is -46 (=D3h). Internally, this value is sign-extended to 13 bits.
DS96WRL0501
PRELIMINARY
1-35