Z87000 Datasheet, PDF (3/50 Pages) Zilog, Inc. – Spread Spectrum Controllers

Zilog
Z87000/Z87L00
Spread Spectrum Controllers
RX
VREF
ADC
(1-bit)
FSK Demodulator
(downconverter, limiter discriminator,
AFC, bit sync, frame sync, SNR
detector)
Receive
Rate
Buffer
Z87010
VXDATA[7..0]
VXADD[2..0]
1
Interface
VXSTRB
VXRWB
VXRDYB
TX
DAC
(4-bit)
FSK Modulator
Transmit
Rate
Buffer
CLKOUT
CODCLK
RXON
RFRX
RFTX
RFEON
SYLE
256 Word
RAM 0
256 Word
RAM 1
Port 0 P0[15..0]
RSSI
PWLV
ANT0
ANT1
HBSW
ADC
(8-bit)
DAC
(4-bit)
RESETB
TEST
Frame Counter(s),
Event Trigger,
T/R Switch Ctrl,
Power On/Off Ctrl,
Antenna Select
DSP Core
12K Words
Program ROM
Port 1
P1[15..0]
Analog
Power
Digital
Power
AVDD
AGND
VDD
GND
Figure 2. Z87000 Functional Block Diagram
DS96WRL0501
PRELIMINARY
1-3