DS923 Datasheet, PDF (28/56 Pages) Xilinx, Inc – DC and AC Switching Characteristics

Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics
Input/Output Delay Switching Characteristics
Table 29: Input/Output Delay Switching Characteristics
Symbol
Description
Speed Grade and
V_CCINT Operating Voltages
0.90V
0.85V
0.72V
-3
-2
-1
-2
-1
F_REFCLK
REFCLK frequency
(component mode).
REFCLK frequency (native mode).
200 to
2400
200 to 800
200 to
2400
200 to
2133
T_{MINPER_RST}
T_{IDELAY_RESOLUTION}/
T_{ODELAY_RESOLUTION}
Minimum reset pulse width.
IDELAY/ODELAY chain resolution.
52.00
2.5 to 15
Units
MHz
MHz
ns
ps
DSP48 Slice Switching Characteristics
Table 30: DSP48 Slice Switching Characteristics
Symbol
Description
Speed Grade and
V_CCINT Operating Voltages
0.90V
0.85V
0.72V
-3
-2
-1
-2
-1
Maximum Frequency
F_MAX
F_{MAX_PATDET}
F_{MAX_MULT_NOMREG}
With all registers used.
891
775
645
644
600
With pattern detector.
794
687
571
562
524
Two register multiply without
MREG.
635
544
456
440
413
F_{MAX_MULT_NOMREG_PATDET}
Two register multiply without
MREG with pattern detect.
577
492
410
395
371
F_{MAX_PREADD_NOADREG}
F_{MAX_NOPIPELINEREG}
Without ADREG.
Without pipeline registers
(MREG, ADREG).
655
565
468
453
423
483
410
338
323
304
Without pipeline registers
F_{MAX_NOPIPELINEREG_PATDET} (MREG, ADREG) with pattern
detect.
448
379
314
299
280
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
DS923 (v1.0) April 20, 2016
Advance Product Specification
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