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DS923 Datasheet, PDF (25/56 Pages) Xilinx, Inc – DC and AC Switching Characteristics
Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics
Output Delay Measurements
Output delays are measured with short output traces. Standard termination was used for all testing. The
propagation delay of the trace is characterized separately and subtracted from the final measurement, and
is therefore not included in the generalized test setups shown in Figure 1 and Figure 2.
X-Ref Target - Figure 1
VREF
Output
RREF
VMEAS (voltage level when taking delay measurement)
CREF (probe capacitance)
X-Ref Target - Figure 2
Figure 1: Single-Ended Test Setup
ds923_01_041816
Output
+
CREF
RREF VMEAS
–
ds923_02_041816
Figure 2: Differential Test Setup
Parameters VREF, RREF, CREF, and VMEAS fully describe the test conditions for each I/O standard. The most
accurate prediction of propagation delay in any given application can be obtained through IBIS
simulation, using this method:
1. Simulate the output driver of choice into the generalized test setup using values from Table 26.
2. Record the time to VMEAS.
3. Simulate the output driver of choice into the actual PCB trace and load using the appropriate IBIS
model or capacitance value to represent the load.
4. Record the time to VMEAS.
5. Compare the results of step 2 and step 4. The increase or decrease in delay yields the actual
propagation delay of the PCB trace.
DS923 (v1.0) April 20, 2016
Advance Product Specification
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