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DS923 Datasheet, PDF (26/56 Pages) Xilinx, Inc – DC and AC Switching Characteristics
Virtex UltraScale+ FPGA Data Sheet: DC and AC Switching Characteristics
Table 26: Output Delay Measurement Methodology
Description
I/O Standard Attribute
LVCMOS, 1.2V
LVCMOS, 1.5V
LVCMOS, 1.8V
LVDCI, HSLVDCI, 1.5V
LVDCI, HSLVDCI, 1.8V
HSTL (high-speed transceiver logic), class I, 1.2V
HSTL, class I, 1.5V
HSTL, class I, 1.8V
HSUL (high-speed unterminated logic), 1.2V
SSTL12 (stub series terminated logic), 1.2V
SSTL135, 1.35V
SSTL15, 1.5V
SSTL18, class I, 1.8V
POD10, 1.0V
POD12, 1.2V
DIFF_HSTL, class I, 1.2V
DIFF_HSTL, class I, 1.5V
DIFF_HSTL, class I, 1.8V
DIFF_HSUL, 1.2V
DIFF_SSTL12, 1.2V
DIFF_SSTL135, 1.35V
DIFF_SSTL15, 1.5V
DIFF_SSTL18, 1.8V
DIFF_POD10, 1.0V
DIFF_POD12, 1.2V
LVDS (low-voltage differential signaling), 1.8V
SUB_LVDS, 1.8V
MIPI D-PHY (high speed) 1.2V
MIPI D-PHY (low power) 1.2V
LVCMOS12
LVCMOS15
LVCMOS18
LVDCI_15, HSLVDCI_15
LVDCI_15, HSLVDCI_18
HSTL_I_12
HSTL_I
HSTL_I_18
HSUL_12
SSTL12
SSTL135
SSTL15
SSTL18_I
POD10
POD12
DIFF_HSTL_I_12
DIFF_HSTL_I
DIFF_HSTL_I_18
DIFF_HSUL_12
DIFF_SSTL12
DIFF_SSTL135
DIFF_SSTL15
DIFF_SSTL18_I
DIFF_POD10
DIFF_POD12
LVDS
SUB_LVDS
MIPI_DPHY_DCI_HS
MIPI_DPHY_DCI_LP
Notes:
1. CREF is the capacitance of the probe, nominally 0 pF.
2. The value given is the differential output voltage.
RREF CREF(1) VMEAS
(Ω) (pF) (V)
1M
0
0.6
1M
0
0.75
1M
0
0.9
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
50
0
VREF
100
0
0(2)
100
0
0(2)
100
0
0(2)
1M
0
0.6
VREF
(V)
0
0
0
0.75
0.9
0.6
0.75
0.9
0.6
0.6
0.675
0.75
0.9
1.0
1.2
0.6
0.75
0.9
0.6
0.6
0.675
0.75
0.9
1.0
1.2
0
0
0
0
DS923 (v1.0) April 20, 2016
Advance Product Specification
www.xilinx.com
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