DS568 Datasheet, PDF (20/22 Pages) Xilinx, Inc – LogiCORE IP XPS LL FIFO

LogiCORE IP XPS LL FIFO (v1.02a)
Table 16: XPS LL FIFO Sample TX/RX Usage (Cont’d)
ISR
Read Word
0x00000000
Read interrupt status register
TDFV
Read Word
0x000001FE
Read the transmit FIFO vacancy
Receive a packet
ISR
Read Word
0x04000000
A typical value after Rx Complete is indicated by interrupt
ISR
Write Word
0xFFFFFFFF
Write to clear reset done interrupt bits
ISR
Read Word
0x00000000
Read interrupt status register
RDFO
Read Word
0x00000011
Read the receive FIFO occupancy
RLR
Read Word
0x00000040
Receive length (0x40 =64 bytes) indicates number of bytes to
read
RDFO
Read Word
0x00000010
Read the receive FIFO occupancy
RXFIFO_DATA Read Word
0xFFFFFFFF
4 bytes of destination address
RXFIFO_DATA Read Word
0xFFFF9ABC
2 bytes destination address, (0xFFFF), 2 bytes source address
(0x9ABC)
RXFIFO_DATA Read Word
0x12345678
4 bytes source address
RXFIFO_DATA Read Word
0x002E0001
2 bytes length, (0x002E), 2 bytes packet data (0x0001)
RXFIFO_DATA Read Word
0x00010203
4 bytes of packet data
RXFIFO_DATA Read Word
0x04050607
4 bytes of packet data
RXFIFO_DATA Read Word
0x08090A0B
4 bytes of packet data
RXFIFO_DATA Read Word
0x0C0D0E0F
4 bytes of packet data
RXFIFO_DATA Read Word
0x10111213
4 bytes of packet data
RXFIFO_DATA Read Word
0x14151617
4 bytes of packet data
RXFIFO_DATA Read Word
0x18191A1B
4 bytes of packet data
RXFIFO_DATA Read Word
0x1C1D1E1F
4 bytes of packet data
RXFIFO_DATA Read Word
0x20212223
4 bytes of packet data
RXFIFO_DATA Read Word
0x24252627
4 bytes of packet data
RXFIFO_DATA Read Word
0x28292A2B
4 bytes of packet data
RXFIFO_DATA Read Word
0x3DC21B56
4 bytes of CRC value
RDFO
Read Word
0x00000000
Read the receive FIFO occupancy (no further receive packets to
process)
Design Implementation
Design Tools
The XPS LL FIFO design is implemented using VHDL code. Xilinx XST is the synthesis tool used for synthesizing
the XPS LL FIFO core.
Target Technology
The target technology is an FPGA listed in the Supported Device Family field of the LogiCORE IP Facts Table.
DS568 March 1, 2011
www.xilinx.com
20
Product Specification