W25M02GVZEIG-TR Datasheet, PDF (9/68 Pages) Winbond – 3V 2G-BIT (2 x 1G-BIT) SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ CONCURRENT OPERATIONS

W25M02GV
3.3 Ball Configuration TFBGA 8x6-mm (5x5 or 6x4 Ball Array)
Figure 1b. W25M02GV Ball Assignments, 24-ball TFBGA 8x6-mm (Package Code TB & TC)
3.4 Ball Description TFBGA 8x6-mm
BALL NO.
B2
B3
B4
C2
C4
D2
D3
D4
Multiple
PIN NAME
CLK
GND
VCC
/CS
/WP (IO2)
DO (IO1)
DI (IO0)
/HOLD (IO3)
NC
I/O
FUNCTION
I
Serial Clock Input
Ground
Power Supply
I
Chip Select Input
I/O
Write Protect Input (Data Input Output 2)⁽²⁾
I/O Data Output (Data Input Output 1)⁽¹⁾
I/O
Data Input (Data Input Output 0)⁽¹⁾
I/O
Hold Input (Data Input Output 3)⁽²⁾
No Connect
Notes:
1. IO0 and IO1 are used for Standard and Dual SPI instructions
2. IO0 – IO3 are used for Quad SPI instructions, /WP & /HOLD functions are only available for Standard/Dual SPI.
Publication Release Date: July 1, 2015
-8-
Preliminary - Revision B