W25M02GVZEIG-TR Datasheet, PDF (3/68 Pages) Winbond – 3V 2G-BIT (2 x 1G-BIT) SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ CONCURRENT OPERATIONS

W25M02GV
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
Cumulative ECC Status (ECC-1, ECC-0) – Status Only.......................................................19
Program/Erase Failure (P-FAIL, E-FAIL) – Status Only .......................................................20
Write Enable Latch (WEL) – Status Only .............................................................................20
Erase/Program In Progress (BUSY) – Status Only ..............................................................20
Reserved Bits – Non Functional ...........................................................................................20
7.4 Single Die W25N01GV Status Register Memory Protection .............................................. 21
8. INSTRUCTIONS ............................................................................................................................. 22
8.1 Device ID and Instruction Set Tables ................................................................................. 22
8.1.1 Manufacturer and Device Identification ................................................................................22
8.1.2 Instruction Set Table 1 (Continuous Read, BUF = 0, xxIT Default Power Up Mode)............23
8.1.3 Instruction Set Table 2 (Buffer Read, BUF = 1, xxIG Default Power Up Mode)....................24
8.2 Instruction Descriptions ...................................................................................................... 26
8.2.1 Software Die Select (C2h) ....................................................................................................26
8.2.2 Device Reset (FFh) ..............................................................................................................27
8.2.3 Read JEDEC ID (9Fh) ..........................................................................................................28
8.2.4 Read Status Register (0Fh / 05h).........................................................................................29
8.2.5 Write Status Register (1Fh / 01h).........................................................................................30
8.2.6 Write Enable (06h) ...............................................................................................................31
8.2.7 Write Disable (04h)...............................................................................................................31
8.2.8 Bad Block Management (A1h)..............................................................................................32
8.2.9 Read BBM Look Up Table (A5h) ..........................................................................................33
8.2.10 Last ECC Failure Page Address (A9h) ...............................................................................34
8.2.11 128KB Block Erase (D8h)...................................................................................................35
8.2.12 Load Program Data (02h) / Random Load Program Data (84h).........................................36
8.2.13 Quad Load Program Data (32h) / Quad Random Load Program Data (34h) .....................37
8.2.14 Program Execute (10h).......................................................................................................38
8.2.15 Page Data Read (13h)........................................................................................................39
8.2.16 Read Data (03h) .................................................................................................................40
8.2.17 Fast Read (0Bh) .................................................................................................................41
8.2.18 Fast Read with 4-Byte Address (0Ch) ................................................................................42
8.2.19 Fast Read Dual Output (3Bh) .............................................................................................43
8.2.20 Fast Read Dual Output with 4-Byte Address (3Ch) ............................................................44
8.2.21 Fast Read Quad Output (6Bh)............................................................................................45
8.2.22 Fast Read Quad Output with 4-Byte Address (6Ch)...........................................................46
8.2.23 Fast Read Dual I/O (BBh)...................................................................................................47
8.2.24 Fast Read Dual I/O with 4-Byte Address (BCh)..................................................................48
8.2.25 Fast Read Quad I/O (EBh) .................................................................................................49
8.2.26 Fast Read Quad I/O with 4-Byte Address (ECh) ................................................................51
8.2.27 Accessing Unique ID / Parameter / OTP Pages (OTP-E=1)...............................................53
8.2.28 Parameter Page Data Definitions .......................................................................................54
9. ELECTRICAL CHARACTERISTICS............................................................................................... 55
Publication Release Date: July 1, 2015
-2-
Preliminary - Revision B