W25M02GVZEIG-TR Datasheet, PDF (31/68 Pages) Winbond – 3V 2G-BIT (2 x 1G-BIT) SERIAL SLC NAND FLASH MEMORY WITH DUAL/QUAD SPI BUFFER READ & CONTINUOUS READ CONCURRENT OPERATIONS

W25M02GV
8.2.5 Write Status Register (1Fh / 01h)
The Write Status Register instruction allows the Status Registers to be written. The writable Status
Register bits include: SRP[1:0], TB, BP[3:0] and WP-E bit in Status Register-1; OTP-L, OTP-E, SR1-L,
ECC-E and BUF bit in Status Register-2. All other Status Register bit locations are read-only and will not
be affected by the Write Status Register instruction.
To write the Status Register bits, the instruction is entered by driving /CS low, sending the instruction code
“1Fh or 01h”, followed by an 8-bit Status Register Address, and then writing the status register data byte
as illustrated in Figure 8.
Refer to section 7.1-3 for Status Register descriptions. After power up, factory default for BP[3:0], TB,
ECC-E bits are 1, while other bits are 0.
Figure 8. Write Status Register-1/2/3 Instruction
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Publication Release Date: July 1, 2015
Preliminary - Revision B