W925EP01 Datasheet, PDF (84/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
Ring Detector
The application circuit in Figure 6-13 illustrates the relationship between the RNGDI, RNGRC and
RNG signals. The combination of RNGDI and RNGRC is used to detect an increase of the RNGDI
voltage from ground to a level above the Schmitt trigger high going threshold voltage V_T+.
Tip/A
C1=0.1uF _R1=470K
R3=200K
RNGDI
Ring/B
C1=0.1uF
R2=470K
R4=300K
R5=150K
RNGRC
C3=0.22uF
RNG
Allowance minimal ring voltage (peak to peak) is:
Vpp _{(max ring)} = 2 (V_T+(max) (R1 + R3 + R4) / R4 + 0.7)
Tolerance to noise between Tip and Ring and VSS is:
Vpeak _{(max noise)} = V_T+(min) (R1 + R3 + R4) / R4 + 0.7
Time constant is:
T = R5 C3 ln [VDD / (VDD - V_T+)]
V_T+(min) <= V_T+ <= V_T+(max)
R5 from 10K ohm to 500K ohm.
C3 from 47 nF to 0.68 uF.
Figure 6-13 Application Circuit of the Ring Detector
The RC time constant of the RNGRC pin is used to delayed the output pulse of the RNG flag for a low
going edge on RNGDI. This edge goes from above the V_T+ voltage to the Schmitt trigger low going
threshold voltage V_T-. The RC time constant must be greater than the maximum period of the ring
signal, to ensure a minimum RNG high interval and to filter the ring signal to get an envelope output.
The rising signal of RNG will set the bit RNGF(CIDFG.0) high to cause the CID flag(CIDF) high.
The diode bridge shown in Figure 6-13 works for both single ended ring signal and balanced ringing.
The R1 and R2 are used to set the maximum loading and must be of equal value to achieve balanced
loading at both the tip and ring line. R1, R3 and R4 form a resistor divider to supply a reduced voltage
to the RNGDI input. The attenuation value is determined by the detection of minimal ring voltage and
maximum noise tolerance between tip/ring and ground.
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