W925EP01 Datasheet, PDF (16/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
DPH1:
This is the high byte of the new additional 16-bit data pointer. That has been added to the
W925EP01. The user can switch between DPL, DPH and DPL1, DPH1 simply by setting
register DPS = 1. The instructions that use DPTR will now access DPL1 and DPH1 in place
of DPL and DPH. If they are not required, they used as conventional register locations by the
user.
DATA POINTER SELECT
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
-
-
-
-
-
-
-
DPS.0
Mnemonic: DPS
Address: 86h
DPS.0: This bit is used to select the DPL, DPH pair or the DPL1, DPH1 pair as the active Data
Pointer. When set to 1, DPL1, DPH1 will be selected, otherwise DPL, DPH will be selected.
DPS.1-7: These bits are reserved, but will read 0.
POWER CONTROL
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
SMOD SMOD0 SFS IDLT GF1 GF0
PD
IDL
Mnemonic: PCON
Address: 87h
SMOD: This bit doubles the serial port0 baud rate in mode 1, 2, and 3 when set to 1.
SMOD0: Framing Error Detection Enable: When SMOD0 is set to 1, and then SCON.7 indicates a
Frame Error and acts as the FE flag. When SMOD0 is 0, then SCON.7 acts as SM0.
SFS: Serial port0 mode1 and mode3 frequency source switch.
SFS=0 Serial port0 mode1 and mode3 frequency source is from Timer0
SFS=1 ^{Serial port0 mode1 and mode3 frequency source is from Timer1}
IDLT:
This bit controls the idle mode type. In idle mode when idle mode is released by any
interrupt, if IDLT=1 it will not jump to the corresponding interrupt; if IDLT=0 it will jump to the
corresponding interrupt.
GF1-0: These two bits are general-purpose user flags.
PD:
Setting this bit causes the W925EP01 to go into the POWER DOWN mode. In this mode all
the clocks are stopped and program execution is frozen. Power down mode can be released
by INT0~INT3 and ring detection of CID interrupt.
IDL: Setting this bit causes the W925EP01 to go into the IDLE mode. The type of idle mode is
selected by IDLT. In this mode the clocks to the CPU are stopped, so program execution is
frozen. But the clock path to the timer blocks and interrupt blocks is not stopped, and these
blocks continue operating.
TIMER CONTROL
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
TF1 TR1 TF0 TR0 IE1
IT1
IE0
IT0
Mnemonic: TCON
Address: 88h
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