W925EP01 Datasheet, PDF (59/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
Timer 0
Overflow
0
2
Timer 1 BG Counter
Overflow Overflow
1
SFS(PCON.5)
Write to
SBUF
TB8
Internal
Data Bus
SMOD
(PCON.7) ⁰
1
TCKEN 0 1
16
TX START TX SHIFT
TX CLOCK
TI
RCKEN 0 1
16
SAMPLE
1-TO-0
DETECTOR
SERIAL
CONTROLLER ^RI
RX CLOCK
RX
START
LOAD
SBUF
RX SHIFT
STOP
D8
PARIN
START ^SOUT
LOAD
CLOCK
Transmit Shift Register
TXD
Serial Port
Interrupt
Read
SBUF
RXD
BIT
DETECTOR
CLOCK
PAROUT
SBUF
SIN
D8
RB8
Receive Shift Register
Internal
Data
Bus
Figure 6-12 Serial Port Mode 3
Framing Error Detection
A Frame Error occurs when a valid stop bit is not detected. This could indicate incorrect serial data
communication. Typically, the frame error is due to noise and contention on the serial communication
line. The W925EP01 has the facility to detect such framing errors and set a flag which can be checked
by software.
The Frame Error FE bit is located in SCON.7. This bit is normally used as SM0; therefore, the bit is
named as SM0/FE. There are actually two separate flags, one for SM0 and the other for FE. The flag
that is actually accessed as SCON.7 is determined by SMOD0 (PCON.6) bit. When SMOD0 is set to
1, then the FE flag is indicated in SM0/FE. When SMOD0 is set to 0, then the SM0 flag is indicated in
SM0/FE.
The FE bit is set to 1 by hardware but must be cleared by software. Note that SMOD0 must be 1 while
reading or writing to FE. If FE is set, then any following frames received without any error will not clear
the FE flag. The clearing has to be done by software.
SERIAL PORT1
The P4.0 and P4.1 can be used as an 8-bit serial input/output port1. P4.0 is the serial port1 clock I/O
pin and P4.1 is the serial port1 data I/O pin. The serial port1 is controlled by SCON1 register which is
described as below.
SF1:
Serial port1 interrupt flag. When 8-bits data transited completely, SF1 is set by hardware.
SF1 is cleared when serial interrupt routine is executed or cleared by software.
REGON: Regulator on/off control. 0 will disable regulator, 1 will enable regulator.
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Publication Release Date: Apr. 10, 2006
Revision A2