W925EP01 Datasheet, PDF (56/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
After shifting in 8 data bits, there is one more shift to do, after which the SBUF and RB8 are loaded
and RI is set. However, certain conditions must be met before the loading and setting of RI can be
done.
1. RI must be 0 and
2. Either SM2 = 0, or the received stop bit = 1.
If these conditions are met, then the stop bit goes to RB8, the 8 data bits go into SBUF and RI is set.
Otherwise, the received frame may be lost. After the middle of the stop bit, the receiver goes back to
looking for a 1-to-0 transition on the RxD pin.
Timer 0
Overflow
0
2
Timer 1 BG Counter
Overflow _Overflow
1
SFS(PCON.5)
Write to
SBUF
Internal
Data Bus
SMOD
(PCON.7) ⁰
1
TCKEN _{0 1}
16
TX START TX SHIFT
TX CLOCK
TI
Transmit Shift Register
STOP
PARIN
START ^SOUT
LOAD
CLOCK
RCKEN 0 ₁
16
SERIAL
CONTROLLER ^RI
SAMPLE
1-TO-0
DETECTOR
RX CLOCK
RX
START
LOAD
SBUF
RX SHIFT
RXD
BIT
DETECTOR
CLOCK
PAROUT
SBUF
SIN
D8
RB8
Receive Shift Register
TXD
Serial Port
Interrupt
Read
SBUF
Internal
Data
Bus
Figure 6-9 Serial Port 0 Mode 1
MODE 2
This mode uses 11 bits in asynchronous full-duplex communication. The functional description is
shown in the figure below. The frame consists of one start bit (0), 8 data bits (LSB first), a
programmable 9th bit (TB8) and a stop bit (0). The 9th bit received is put into RB8. The baud rate is
programmable to 1/6 or 1/32 of the system clock which is determined by the SMOD (PCON.0).
Transmission begins with a write to SBUF. The serial data is brought out on to TxD pin at C1 following
the first rollover of the divide by 16 bit counter. The next bit is placed on TxD pin at C1 following the
next rollover of the divide by 16 bit counter. Thus the transmission is synchronized to the divide by 16
bit counter, and not directly to the write to SBUF signal. After all 9 bits data has been transmitted, then
the stop bit is transmitted. The TI flag is set in the C1 state after the stop bit has been put out on TxD
pin. This will be at the 11th rollover of the divide by 16 bit counter after a write to SBUF. Reception is
enabled only if REN is high. The serial port actually starts the receiving of serial data, with the
detection of a falling edge on the RxD pin. The 1-to-0 detector continuously monitors the RxD line,
sampling it at the rate of 16 times the selected baud rate. When a falling edge is detected, the divide
by 16 bit counter is immediately reset. This helps to align the bit boundaries with the rollovers of the
divide by 16 bit counter. The 16 states of the counter effectively divide the bit time into 16 slices. The
bit detection is done on a best of three bases. The bit detector samples the RxD pin, at the 8th, 9th
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