W925EP01 Datasheet, PDF (6/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
Pin Description, continued
SYMBOL
I/O
RESET
I
BUZ
O
DTMF
O
P00-P07
I/O
P10-P17
I/O
P20-P27
I/O
P30-P37
I/O
P40-P47
I/O
P50-P57
I/O
P60-P67
I/O
P70-P77
I/O
TEST
I
TEST1
I
PSEN
O
FUNCTION
RESET pin. A high pulse causes the whole chip reset. This pin with internal
pull-low resistor.
Buzzer output pin. If buzzer function is disabled, BUZ pin is kept in floating
state.
DTMFG=1, CASGE=FTE=0, Dual-Tone Multi-Frequency (DTMF) signal
output.
FTE=1, CASGE=DTMFG=0, FSK signal output. CASGE=1, FTE=DTMF=0,
CAS signal output. For signal send to the DTMF pin, CAS has the first
priority, FSK has the second priority, and DTMF has the third priority.
Input/output port0. Port0 data can be bit controlled. The I/O mode is
controlled by P0IO register. Port0 is open drain type when it is configured as
output mode.
Input/output port1 with pull high resistors. Port1 data can be bit controlled.
The I/O mode is controlled by P1IO register. The P10-P13 and P14-P17
indicate the external interrupt pins. (INT2 and INT3)
Input/output port2 with pull high resistors. Port2 data can be bit controlled.
The I/O mode is controlled by P2IO register.
Input/output port3 with pull high resistors. Port3 data can be bit controlled.
The I/O mode is controlled by P3IO register. The special function of port3 is
referred to the description of P3 register.
Contents are byte controlled. Pull high and I/O mode can be bit controlled.
The special function of P4 is referred to the description of P4 register.
The comparator analog input pins V- and V+, share with P4.2 (VNEG) and
P4.4 (VPOS) pins.
Contents are byte controlled. Pull high and I/O mode can be bit controlled.
The special function of P5 is referred to the description of P5 register. P5
outputs the address <7:0> of the external program ROM multiplexed with
the address <7:0> of the external data RAM.
Contents are byte controlled. Pull high and I/O mode can be bit controlled.
The special function of P6 is referred to the description of P6 register. P6
outputs the address <7:0> of the external program ROM multiplexed with
the address <15:8> of the external data RAM. During the execution of
“MOVX @Ri”, the output of P6 comes from the HB register, which is the
high byte address, and its address is 0A1H.
Contents are byte controlled. Pull high and I/O mode can be bit controlled.
The special function of P7 is referred to the description of P7 register. P7
inputs the data <7:0> of the external ROM. Or, P7 inputs/outputs the data
<7:0> of the external data RAM.
Test pin. This pin has the built-in pull low resistor.
Test pin, This pin must be fixed to VDD.
PROGRAM STORE ENABLE. This pin always emits pulses during access
to external program ROM.
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