W925EP01 Datasheet, PDF (36/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
BG: Move the proper value into this register for generating the baud rate of serial port0. When BG-
Counter is overflow, the content of BG will be reloaded into the BG-Counter.
The baud rate of serial port0 is generated by Fm/BG/16.
Example: if Fm=4MHz and the content of BG is 1Ah (initial value), the baud rate = 4000000/26/16
= 9615Hz;
if the content of BG is changed to 0Dh, the baud rate should be 4000000/13/16
= 19230Hz.
PROGRAM STATUS WORD
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
CY
AC
F0
RS1 RS0 OV
F1
P
Mnemonic: PSW
Address: D0h
CY: Carry flag. Set for an arithmetic operation, which results in a carry being generated from the
ALU. It is also used as the accumulator for the bit operations.
AC: Auxiliary carry. Set when the previous operation resulted in a carry from the high order nibble.
F0: User flag 0: General purpose flag. That can be set or cleared by the user.
RS.1-0: Register bank selection bits:
RS1 RS0 REGISTER BANK ADDRESS
00
0
00-07h
01
1
08-0Fh
10
2
10-17h
11
3
18-1Fh
OV: Overflow flag. Set when a carry was generated from the seventh bit but not from the 8th bit as a
result of the previous operation, or vice-versa.
F1: User Flag 1: General purpose flag. That can be set or cleared by the user by software.
P: Parity flag. Set/cleared by hardware to indicate odd/even number of 1's in the accumulator.
WATCHDOG CONTROL
(initial: note)
Bit:
7
-
6
5
4
3
2
1
0
POR
-
WFS WDIF WTRF EWT RWT
Mnemonic: WDCON
Address: D8h
POR: Power-on reset flag. Hardware will set this flag when system is powered on and this flag is
cleared only by software.
WFS: Watchdog Timer Frequency Select. Set to select F_S as WDT clock input. Clear to select F_OSC as
WDT clock input.
WDIF: Watchdog Timer Interrupt flag. This bit is set whenever the time-out occurs in the watchdog
timer. If the Watchdog interrupt is enabled (EIE.5), then an interrupt will occur (if the global
interrupt enable is set and other interrupt requirements are met). Software or any reset can
clear this bit.
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