W925EP01 Datasheet, PDF (33/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
SF1:
Serial port1 interrupt flag. When 8-bits data transited completely, SF1 is set by hardware.
SF1 is cleared when serial interrupt routine is executed or cleared by software.
REGON: Regulator on/off control. 0 will disable regulator, 1 will enable regulator.
REN1: Set REN1 from 0 to 1 to start the serial port to receive 8-bit serial data.
SFQ: SFQ=0 Serial clock output frequency is equal to Fosc /2
SFQ=1 Serial clock output frequency is equal to Fosc /256
SEDG: SEDG=0 Serial data latched at falling edge of clock, SCLK=Low initially.
SEDG=1 Serial data latched at rising edge of clock, SCLK=High initially
CLKIO: CLKIO=0 P4.0 (SCLK) work as output mode
CLKIO=1 P4.0 (SCLK) work as input mode
SIO: SIO=0 P4.0 & P4.1 work as normal I/O pin
SIO=1 P4.0 & P4.1 work as Serial port1 function
SERIAL DATA BUFFER 1
(initial=00H) Read Only
Bit:
7
6
5
4
3
2
1
0
SBUF1.7 SBUF1.6 SBUF1.5 SBUF1.4 SBUF1.3 SBUF1.2 SBUF1.1 SBUF1.0
Mnemonic: SBUF1
Address: C1h
SBUF1.7-0: Serial data on the serial port1 is read from or written to this location. It actually consists of
two separate internal 8-bit registers. One is the receive register, and the other is the
transmit buffer. Any read access gets data from the receive data buffer, while write
access is to the transmit data buffer.
POWER MANAGEMENT REGISTER
(initial=10000XX1B)
Bit:
7
6
5
4
3
2
XT/ RG ^{RGMD RGSL X2OFF X1OFF}
-
1
0
-
DME0
Mnemonic: PMR
Address: C4h
XT/ RG : Crystal/RC Oscillator Select. Setting this bit selects crystal or external clock as system clock
source. Clearing this bit selects the on-chip RC oscillator as clock source. X1UP (STATUS.4)
must be set to 1 and X1OFF (PMR.3) must be cleared before this bit can be set. Attempts to
set this bit without obeying these conditions will be ignored.
RGMD: RC Mode Status. This bit indicates the current clock source of micro-controller. When it is
cleared, CPU is operating from the external crystal or oscillator. When it is set, CPU is
operating from the on-chip RC oscillator.
RGSL: RC Oscillator Select. This bit selects the clock source following a resume from Power Down
Mode. Setting this bit allows device operating from RC oscillator when a resume from Power
down Mode. When this bit is cleared, the device will hold operation until the crystal oscillator
has warmed-up following a resume from Power down Mode.
X2OFF: Set to disable sub-oscillator (32 KHz oscillator)
X1OFF:Crystal Oscillator Disable. Setting this bit disables the external crystal oscillator. This bit can
only be set to 1 while the micro-controller is operating from the RC oscillator. Clearing this bit
- 33 -
Publication Release Date: Apr. 10, 2006
Revision A2