W925EP01 Datasheet, PDF (39/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
TA: The Timed Access register controls the access to protected bits. To access protected bits, the
user must first write AAH to the TA. This must be immediately followed by a write of 55H to TA.
Now a window is opened in the protected bits for three machine cycles, during which the user can
write to these bits.
IN-SYSTEM PROGRAMMING CONTROL REGISTER
(INITIAL=00H)
Bit:
7
6
5
4
3
2
1
0
SWRHWB -
LDAP
-
-
- FBOOTSL FPROGEN
Mnemonic: CHPCON
Address: EFh
BIT
NAME
FUNCTION
7 SWRHWB Set this bit to launch a whole device reset that is same as asserting high to
RESET pin, micro-controller will be back to initial state and clear this bit
automatically. To read this bit, its alternate function to indicate the ISP
hardware reboot mode is invoking when read it in high.
6
-
Reserve.
5
LDAP This bit is Read Only.
High: device is executing the program in LD Flash EPROM.
Low: device is executing the program in AP Flash EPROM.
4
-
Reserve.
3
-
Reserve.
2
-
Reserve.
1 FBOOTSL Loader program residence selection. Set to high to route the device fetching
code from LDROM.
0 FPROGEN In System Programming Mode Enable.
Set this bit to launch the ISP mode. Device will operate ISP procedures, such
as Erase, Program and Read operations, according to correlative SFRs
settings. During ISP mode, device achieves ISP operations by the way of IDLE
state. In the other words, device is not indeed in IDLE mode is set bit PCON.1
while ISP is enabled.
Clear this bit to disable ISP mode, device get back to normal operation
including IDLE state.
B REGISTER
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
B.7
B.6
B.5
B.4
B.3
B.2
B.1
B.0
Mnemonic: B
Address: F0h
B.7-0: The B register serves as a second accumulator.
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Publication Release Date: Apr. 10, 2006
Revision A2