W925EP01 Datasheet, PDF (20/108 Pages) Winbond – 8-BIT CID MICROCONTROLLER

W925EP01/ W925EP01FG
P1.0 : INT2.0
P1.1 : INT2.1
P1.2 : INT2.2
P1.3 : INT2.3
P1.4 : INT3.0
P1.5 : INT3.1
P1.6 : INT3.2
P1.7 : INT3.3
External Interrupt 2
External Interrupt 2
External Interrupt 2
External Interrupt 2
External Interrupt 3
External Interrupt 3
External Interrupt 3
External Interrupt 3
EXTERNAL INTERRUPT FLAG
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
-
-
- COMPF DIVF CIDF IE3
IE2
Mnemonic: EXIF
Address: 91h
COMPF: Comparator flag. Set by hardware when RESC bit is from low to high.
DIVF: Divider overflow flag.
CIDF: CID interrupt flag. Set by hardware when at least one of CID flags is set.
IE3: External Interrupt 3 flag. Set by hardware when a falling edge is detected on INT3.
IE2: External Interrupt 2 flag. Set by hardware when a falling edge is detected on INT2.
ROM PAGE POINTER
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
-
-
-
LT
-
-
-
PG
Mnemonic: RPAGE
Address: 92h
LT: Determines the MOVC content reading is from ROM page0 or page1.
LT = 0 indicates the MOVC reading data is from the ROM page0.
LT = 1 indicates the MOVC reading data is from the ROM page1.
PG: Determines the program ROM page of the executing ROM page.
PG = 0 indicates the executing program is in page 0, from 00000H-0FFFFH
PG = 1 indicates the executing program is in page 1, from 10000H-1FFFFH
P1 PINS STATUS
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
P1.7SR P1.6SR P1.5SR P1.4SR P1.3SR P1.2SR P1.1SR P1.0SR
Mnemonic: P1SR
Address: 93h
P1SR: Set when a falling edge is detected on the corresponding P1 pin, clear by software.
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