W83787IF Datasheet, PDF (82/123 Pages) Winbond – WINBOND I/O WITH SERIAL-INFRARED SUPPORT

W83787IF
GCS0IOR
0
0
1
1
GCS0IOW
0
1
0
1
Chip Select Pin Type
The GIOP0 functions as a Chip select pin, and will active when
(AEN=L) & (SA10~0 = GIOAD10~0)
The GIOP0 functions as a Chip select pin, and will active when
(AEN=L) & (SA10~0 = GIOAD10~0) & (IOW =L)
The GIOP0 functions as a Chip select pin, and will active when
(AEN=L) & (SA10~0 = GIOAD10~0) & (IOR =L)
The GIOP0 functions as a Chip select pin, and will active when
(AEN=L) & (SA10~0 = GIOAD10~0) & (IOR =L or IOW =L)
GDA0OPI, FDA0IPI (Bit 1, Bit0):
These two bits define GIOP0 Data Pin type as shown in the following table.
GDA0OPI
0
0
1
1
GDA0IPI
0
1
0
1
GIOP0 Data Pin Type
The GIO0 function as a data pin, and GIOP0 → SD0, SD0 → GIOP0
The GIO0 function as a data pin, and inverse GIOP0 → SD0,
SD0 → GIOP0
The GIO0 function as a data pin, and GIOP0 → SD0,
inverse SD0 → GIOP0
The GIO0 function as a data pin, and inverse GIOP0 → SD0,
inverse SD0 → GIOP0
7.2.21 Configuration Register 15H (CR15) EFER = 89H, EFIR = 15H (R/W)
When 89H is loaded into EFER and 15H is loaded into EFIR, the CR15 register can be accessed
through EFDR. The bit definitions are as follows:
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Publication ReleaseDate:Sep 1995
Revision A1