W83787IF Datasheet, PDF (74/123 Pages) Winbond – WINBOND I/O WITH SERIAL-INFRARED SUPPORT

W83787IF
7.2.11 Configuration Register A (CRA) EFER = 89H, EFIR = 0AH
When 89H is loaded into EFER and 0AH is loaded into EFIR, the CRA register can be accessed
through EFDR. The bit definitions are as follows:
7 65 4 3 210
PEXTECPP
PEXT ECP
PEXT EPP
PEXT ADP
PDCACT
PDIRHOP
PEXT ACT
PFDCACT
Notes:
PFDCACT (Bit 7):
This bit controls whether PFDCEN (pin 41) is active high or low in portable mode.
0
PFDCEN is active low
1
PFDCEN is active high
PEXTACT (Bit 6):
This bit controls whether PEXTEN (pin 39) is active high or low in portable mode. This pin can also
reflect the mode of the parallel port: EXTADP mode, EPP mode, ECP mode, or ECP/EPP mode, or
any combination of these modes.
0
PEXTEN is active low
1
PEXTEN is active high
PDIRHOP (Bit 5):
This bit determines how the state of pin PDBDIR reflects (in all modes) whether the parallel port data
bus is input or output.
0
If PDBDIR is high, the parallel port data bus direction is input (read);
if PDBDIR is low, the parallel port data bus direction is output (write)
1
If PDBDIR is high, the parallel port data bus direction is output (write);
if PDBDIR is low, the parallel port data bus direction is input (read)
PDCACT (Bit 4):
This bit controls whether the PDCIN pin is active high or low.
0
PDCIN is active low
1
PDCIN is active high
PEXTADP (Bit 3):
This bit controls whether the PEXTEN pin is active in EXTADP mode.
0 PEXTEN is not active in EXTADP mode
1 PEXTEN is active in EXTADP mode
PEXTEPP (Bit 2):
This bit controls whether the PEXTEN pin is active in EPP mode.
0
PEXTEN is not active in EPP mode
1
PEXTEN is active in EPP mode
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Publication ReleaseDate:Sep 1995
Revision A1