W83787IF Datasheet, PDF (16/123 Pages) Winbond – WINBOND I/O WITH SERIAL-INFRARED SUPPORT

W83787IF
IDE and FDC Interface, continued
SYMBOL PIN I/O
DBENL
IDBEN
GIOSEL
91
O
O
I
FUNCTION
During normal operations, DBENL is used to enable the low byte
buffer of the IDE bus. When DBENL is active, it accesses I/O
addresses 1F0H - 1F7H (170H-177H) and 3F6-3F7H (376H-377H).
IDBEN :IDE Data Bus Enable(Low Active). If I/O address 1F0~1F7H
and 2F7H is access, the pin will activate.
DBENH
GIO0
URIRSEL
PDBDIR
FDCEN
IRTX2
During power on reset,if GIOSEL=1,then this pin act as IDBEN .If
GIOSEL=0,this pin act as DBENL .It can also be programmed by
CR0C register bit 2.
GIOSEL:General Purpose I/O pin select at power on setting. (See
Table 1-4)
92
O _{During normal operations, DBENH is used to enable the high byte}
I/O ^{buffer of the IDE bus. DBENH is active only when /IOCS16 is active.}
I
When active, DBENH selects I/O port address range 1F0-1F7H
(170H-177H).
GIO0:General Purpose I/O pin0. If pin #91 GIOSEL=1,this pin act as
GIO0.If GIOSEL=0,this pin act as nDBENH.It can also be
programmed by CR0C register bit 2.
URIRSEL:UART/IR Selection.During power on reset,if
URIRSEL=1,then UARTB act as UART function. If URIRSEL=0,then
UARTB act as IR function.
2
I/O During normal operation, this pin (PDBDIR) is an output that
indicates the direction of the parallel port data bus. If bit 5 of CRA
(PDIRHISOP) is low, then PDBDIR = 0 means output/write, PDBDIR
O _{= 1 means input/read (default). During power-on reset, this pin}
(FDCEN) is pulled down internally and is used to enable the FDC. A
4.7K resistor is recommend in order to pullup the pin at power on
reset to disable the FDC function.
When set to low, it enables the FDC port (default).
When set to high, it disables the FDC port.
PDBDIR can be programmed by CR0D register as output pin IRTX2
for serial infrared communication.
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Publication Release Date:Sep 1995
Revision A1