W83787IF Datasheet, PDF (54/123 Pages) Winbond – WINBOND I/O WITH SERIAL-INFRARED SUPPORT

5.3.9 cnfgB (Configuration Register B) Mode = 111
The bit definitions are as follows:
7 6 5 4 3 21 0
1 11 1 1 1
W83787IF
intrValue
compress
Notes:
Bit 7: This bit is read-only. It is at low level during a read. This means that this chip does not support
hardware RLE compression.
Bit 6: Returns the value on the ISA IRQ line to determine possible conflicts.
Bit 5-0: These five bits are at high level during a read and can be written.
5.3.11 ecr (Extended Control Register) Mode = all
This register controls the extended ECP parallel port functions. The bit definitions are follows:
7 6543210
empty
full
service Intr
dmaEn
nErrIntrEn
MODE
MODE
MODE
Notes:
Bit 7-5: These bits are read/write and select the mode.
000 Standard Parallel Port mode. The FIFO is reset in this mode.
001 PS/2 Parallel Port mode. This is the same as 000 except that direction may be used
to tri-state the data lines and reading the data register returns the value on the data
lines and not the value in the data register.
010 Parallel Port FIFO mode. This is the same as 000 except that bytes are written or
DMAed to the FIFO. FIFO data are automatically transmitted using the standard
parallel port protocol. This mode is useful only when direction is 0.
011 ECP Parallel Port Mode. When the direction is 0 (forward direction), bytes placed into
the ecpDFifo and bytes written to the ecpAFifo are placed in a single FIFO and
transmitted automatically to the peripheral using ECP Protocol. When the direction is
1 (reverse direction) bytes are moved from the ECP parallel port and packed into
bytes in the ecpDFifo.
100 Selects EPP Mode. In this mode, EPP is selected if the EPP supported option is
selected.
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Publication ReleaseDate:Sep 1995
Revision A1