W83787IF Datasheet, PDF (3/123 Pages) Winbond – WINBOND I/O WITH SERIAL-INFRARED SUPPORT

W83787IF
PIN CONFIGURATION
/
/D /
TS R
//R K D
//
M M AN C A A
GI I A
V
O O KWH 1 T D D D D D D D D N O O E A A A A A D A A A A A
B A 0P G 0 A7 6 5 4 3 2 1 0 DWR N 9 8 7 6 5 D 4 3 2 1 0
INDEX
STEP
DSA
DSB
WE
WD
RWC
HEAD
DIR
GND
DBENL
DBENH
IOCS16
CS0
CS1
IDED7
TC
DACK2
IRQ6
DRQ2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
X ₈₁
50 ^X
X ₈₂
49 ^X
X ₈₃
48 ^X
X ₈₄
47 ^X
X ₈₅
46 ^X
X ₈₆
45 ^X
X 87
44 ^X
X 88
43 ^X
X 89
42 ^X
X 90
41 ^X
X 91
40 ^X
X 92
39 ^X
X 93
38 ^X
X 94
37 ^X
X 95
36 X
X 96
35 ^X
X 97
34 ^X
X 98
33 ^X
X 99
32 ^X
X 100
31 ^X
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
/ P P P I MX X P P PP P P V PP / / / / / I B G / P S / S
R D D D OR T T D D D D D D D D D P S AI S R U N A E L E I
EB CRC A A 0 1 2 3 4 5 D 6 7 RT FNL QS D C C RN
SDI QH L L
T B DI I 7 Y K T R A
I I NXR 1 2
O
TN
DR
D
E
E
Y
RIB
DCDB
DSRB
CTSB
DTRB
RTSB
IRQ3
SOUTB
SINB
GMRD
GND
GMWR
SOUTA
IRQ4
RTSA
DTRA
CTSA
DSRA
DCDA
RIA
1.0 PIN DESCRIPTION
Note I: Input pin, O: Output pin, I/O: Bi-directional pin, OD: Open Drain pin.
1.1 Host Interface
SYMBOL PIN I/O
FUNCTION
D0-D7
66-73 I/O System data bus bits 0-7
A0-A9
51-55 I System address bus bits 0-9
57-61
A10
75 I In ECP Mode, this pin is the A10 address input.
IOCHRDY
5 OD In EPP Mode, this pin is the IO Channel Ready output to extend the
host read/write cycle.
MR
6
I Master Reset. Active high. MR is low during normal operations.
Publication Release Date:Sep 1995
-3-
Revision A1