W83787IF Datasheet, PDF (59/123 Pages) Winbond – WINBOND I/O WITH SERIAL-INFRARED SUPPORT

W83787IF
5.6 Extension Adapter Mode (EXTADP)*
In this mode, the W83787IF redefines the printer interface pins for use as an extension adapter,
allowing a pocket peripheral adapter card to be installed through the DB-25 printer connector. The pin
assignments for the extension adapter are shown in table 5-1.
XDO-XD7 are the system data bus for the extension adapter.
XA0-XA2 are the system address bus.
XWR and XRD are the I/O read/write commands with address comparing match or in DMA
access mode.
XDACK , XTC, and XDRQ are used in conjunction with PDACKX , TC, and PDRQX to execute
a DMA cycle.
The extension adapter can issue a DMA request by setting pin XDRQ high, thus sending the
W83787IF output to the host system by pin PDRQX. The DMA controller should recognize the DMA
request and output a relative DACK to pin PDACKX of the W83787IF, which will output the DACK
without any change from pin XDACK to the extension adapter. Once the DMA transfer is completed,
a terminal count (TC) should be issued from the DMA controller to pin TC of W83787IF and output to
the extension adapter via pin XTC. XIRQ is the interrupt request of the extension adapter. The value
of XIRQ coming from the extension adapter will directly pass through pin IRQ7 to the host system.
XIRQ and IRQ7, XDACK and PDACKX , and XDRQ and PDRQX are three input/output pairs of
W83787IF pins. Although these pins are defined as DMA and interrupt functions, they can be
redefined by users for other specific functions.
5.6.1 Operation
The idea behind EXTADP mode is to treat the parallel port DB-25 connector as an ISA slot, except
that its addresses are not issued to the extension adapter. The operation of EXTADP mode is
described below:
1. Set the W83787IF to EXTADP mode by programming bit 7 of CR7 as low and bit 3 and bit 2 of
CR0 as high and low, respectively.
2. The W83787IF CR2 is an address register that records the address of the extension adapter.
When the desired address is written into CR2, pins XWR and XRD of the W83787IF will
simultaneously go low and the desired address will also appear on the printer data bus PD7-PD0.
Users can logically OR these two signals as an initial reset.
3. After the above two steps, every time the host system issues an IOR or IOW command, the
W83787IF will compare the I/O address with the CR2 register. If the comparison matches, the
data, low bits addresses (XA2-XA0), and XWR/XRD will be presented on the parallel port DB-25
connector.
4. DMA operations are handled in the same way as item 3, except that the relevant PDACKX ,
PDRQX will be active on the DB-25 connector.
** Patent pending
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Publication ReleaseDate:Sep 1995
Revision A1