W83787IF Datasheet, PDF (73/123 Pages) Winbond – WINBOND I/O WITH SERIAL-INFRARED SUPPORT

W83787IF
7.2.10 Configuration Register 9 (CR9) EFER = 89H, EFIR = 09H
When 89H is loaded into EFER and 09H is loaded into EFIR, the CR9 register can be accessed
through EFDR. The bit definitions are as follows:
76543210
CHIP ID0
CHIP ID1
CHIP ID2
CHIP ID3
Reserved
EN3MODE
LOCKREG
PRTMODS2
Notes:
PRTMODS2 (Bit 7):
This bit and PRTMODS1, PRTMODS0 (bits 3, 2 of CR0) select the operating mode of the W83787IF.
Refer to the descriptions of CR0.
LOCKREG (Bit 6):
This bit enables or disables the reading and writing of all configuration registers.
0
Enables the reading and writing of CR0-CRB
1
Disables the reading and writing of CR0-CRB (locks W83787IF extension
functions)
EN3MODE (Bit 5):
This bit enables or disables three mode FDD selection. When this bit is high, it enables the read/write
3F3H register.
0
Disables 3 mode FDD selection
1
Enables 3 mode FDD selection
When three mode FDD function is enabled, the value of RWC depends on bit 5 and bit 4 of
TDR(3F3H). The values of RWC and their meaning are shown in Table 7-4.
Table 7-4
BIT 5 OF TDR
0
0
1
1
BIT 4 OF TDR
0
1
0
1
RWC
Normal
0
1
X
RWC = 0
250K bps
1.2 M FDD
X
X
RWC = 1
500K bps
X
1.4M FDD
X
Bit 4: Reserved.
CHIP ID 3, CHIP ID 2, CHIP ID 1, CHIP ID 0 (Bit 3-0):
These four bits are read-only bits that contain chip identification information. The value is 9H for
W83787IF during a read.
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Publication ReleaseDate:Sep 1995
Revision A1