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TA1317AN Datasheet, PDF (9/59 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
TA1317AN
Bus Control Map
Write Mode
Slave Address: 8CH (10001100)
Sub-Address
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
D7
MSB
*
V AGC
D6
D5
D4
D3
D2
D1
D0
Preset
LSB
MSB LSB
PICTURE HEIGHT
VD
1000 0000
PICTURE WIDTH1
V SHIFT
1000 0000
V LINEARITY
V-EHT COMPENSATION
1000 0000
ANALOG V-BLK STOP PHASE
H-EHT COMPENSATION
1000 0000
ANALOG V-BLK START PHASE
V-RAMP LIMIT2
1000 0000
V CENTERING
V-RAMP LIMIT1 1000 0000
V-DF PHASE
V-DF AMPLITUDE
1000 1000
H-DF PHASE
H-DF AMPLITUDE
1000 1000
H-DF CURVE
V INTEGRAL CORRECTION
1000 0000
V S CORRECTION
1000 0000
*
EW PARABOLA
1000 0000
EW TRAPEZIUM
V STOP
1000 0000
EW TOP CORNER
*
*
PICTURE WIDTH2 1000 0000
EW BOTTOM CORNER
*
*
*
1000 0000
EW S CORRECTION
*
*
*
1000 0000
EW CORNER
*
*
*
1000 0000
CENTER PARABOLA
CENTER SAW
1000 1000
V SYMMETRY
0000 0000
Read Mode
Slave Address: 8DH (10001101)
D7
D6
D5
D4
D3
D2
D1
D0
MSB
LSB
0
V DF
H DF
LVP
V NF
V GUARD
EW OUT
V OUT
POR
9
2002-09-06