TA1317AN Datasheet, PDF (33/59 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

Note
No.
Parameter
13 Vertical integral correction
(V _∫ correction) change
amount
TA1317AN
SW5
OFF
SW6
B
SW7
ON
Test Condition
SW Mode
SW8 SW10 SW11 SW17 SW24
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Set V S CORRECTION (sub-address: 09) to center (data: A0).
(4) Set V SHIFT (sub-address: 01) to 82.
(5) Set V INTEGRAL CORRECTION (sub-address: 08) to minimum (data: 80) and
measure V _∫ (80) as shown in the figure below.
(6) Set V INTEGRAL CORRECTION (sub-address: 08) to maximum (data: 8F) and
measure V _∫ (8F) as shown in the figure below.
(7) Calculate maximum correction V _∫ from measured result using the following
formula.
Pin 6
(V NF) waveform
V_∫
V_∫
(8F)
(80)
V_∫ =
V _∫ (8F) − V _∫ (80)
V _∫ (80)
× 100
33
2002-09-06