English
Language : 

TA1317AN Datasheet, PDF (23/59 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic
Characteristics
Vertical ramp cut level
Analog blanking phase
Parabola amplitude adjustment (EW
parabola) change amount at PWM
Symbol
VCHH
VCLH
BLHL
BLHM
BLHH
BLLL
BLLM
BLLH
VPP (00)
VPP (20)
VPP (3F)
VPP
Test
Circuit












TA1317AN
Test Condition
Min Typ. Max Unit
20.0 26.0 32.0
(Note 41)
%
26.0 32.1 38.0
5.05 5.90 6.75
2.30 2.70 3.10
 0.00 0.10
(Note 42)
ms
5.10 6.00 6.90
2.05 2.40 3.00
 0.00 0.10
0.00 0.02 0.06
1.6 2.00 2.30
(Note 43)
Vp-p
2.80 3.30 3.80
2.80 3.30 3.80
23
2002-09-06