TA1317AN Datasheet, PDF (30/59 Pages) Toshiba Semiconductor – TOSHIBA Bipolar Linear Integrated Circuit Silicon Monolithic

TA1317AN
Note
No.
Parameter
10 Vertical linearity correction
(V linearity) change amount
SW5
OFF
SW6
B
SW7
ON
Test Condition
SW Mode
SW8 SW10 SW11 SW17 SW24
Test Method
(unless otherwise specified, V_CC = 9 V, Ta = 25 ± 3°C, data = preset values)
OFF B
ON
A
A (1) Input vertical trigger pulse to pin V_IN.
Pulse level (VT) = 3.0 V
(2) Set VD (sub-address: 00) to AC-Coupling mode (data: 81).
(3) Set V INTEGRAL CORRECTION (sub-address: 08) to center (data: 88).
(4) Set V S CORRECTION (sub-address: 09) to center (data: A0).
(5) Set V SHIFT (sub-address: 01) data to 82.
(6) Set V LINEARITY (sub-address: 02) to minimum (data: 00) and measure V₁ (00)
and V₂ (00) as shown in the figure below.
(7) Set V LINEARITY (sub-address: 02) to center (data: 80) and measure V₁ (80) and
V₂ (80) as shown in the figure below.
(8) Set V LINEARITY (sub-address: 02) to maximum (data: F8) and measure V₁ (F8)
and V₂ (F8) as shown in the figure below.
(9) Calculate maximum correction V_LIN from measured result using the following
formula.
Pin 6
(V NF) waveform
10 ms
10 ms
V₁ (00) − V₁ (F8) + V₂ (F8) − V₂ (00)
V_LIN =
× 100
2 × [V₁ (80) + V₂ (80)]
30
2002-09-06